In the current integrated circuit (IC) market, the various IC chip manufacturers usually attempt to include as much functionality as possible on chip while holding the chip size as small as possible to obtain a competitive advantage. For example, multifunctional IC's are often provided to help users reduce their respective design cycle and cost. However, as multifunctional chips are developed, the number of pins on the IC package typically increases with the increased functionality implemented on the chip. As a result of increased pin count, the size of the chip increases, which results in higher fabrication costs among other complexities. One possible technique to mitigate this problem is to employ pins that can be shared non-concurrently by two or more circuit blocks within the integrated circuit. However, if the two or more circuit blocks operate according to different input operating ranges and supply voltages, then such sharing is not possible via conventional circuit topologies.